Спутник технологический. LDREX. [Редактировать]

Японский экспериментальный антенный модуль LDREX (LargeScale Deployable Reflector Experiment) – это крупномасштабная отражательная антенна со средствами ее развертывания. Он изготовлен корпорацией Toshiba Corp. по заказу японского космического агентства NASDA. Главной целью запуска LDREX является проверка работы механизма разворачивания этой антенны в интересах программы создания и запуска в 2003 г. экспериментального японского спутника связи ETS VIII. Антенна LDREX является уменьшенной в два раза моделью двух антенн LDR (Large scale Deployable Reflector – крупномасштабный складной отражатель) на ETS VIII.

Дополнительные наименования

#НаименованияПоиск в новостяхПоиск в документах
1Large-scale Deployable Reflector EXperimentНайтиНайти
226640НайтиНайти

Дополнительная классификация

#Наименования
1Тип оператора(владельца) - государственный
2Страна производитель - Япония
3Страна оператор(владелец) - Япония

Технические характеристики

#ХарактеристикаЗначение
1Масса, кг182
2Масса (антенны), кг140
3Масса (блока электроники), кг37
4Масса (видеокамеры), кг2
5Масса (кабельной сети ), кг3
6Габариты (при запуске), метра1.8x0.7x0.7

Пусковые характеристики

#ХарактеристикаЗначение
1Код NSSDC2000-081C

Информация об удачном запуске

#ХарактеристикаЗначение
1Космодром Космодром Куру
2Дата пуска2000-12-20 at 00:26:00 UTC
3Полезная нагрузка 1xAstra 2D
4Полезная нагрузка 1xGE 8
5Полезная нагрузка 1xLDREX
6Ракета-носитель 1xАриан 5G

Найдено 121 документов по запросу «LDREX». [Перейти к поиску]


Дата загрузки: 2016-12-29
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0.18/5
... on an No fix scheduled LDREX that is preceded by a write... the exclusive monitor Description: A conditional LDREX might set the internal exclusive... conditional LDREX along with non-conditional STREX. • If no conditional LDREX is... cannot be triggered. • If conditional LDREX is used, the associated STREX... set by the condition failed LDREX, the following STREX will not... this erratum consists in using LDREX instead of standard LDR in... monitor. So, if a program executes a LDREX/STREX loop which keeps on... middle of the LDREX/STREX sequence, then the LDREX/STREX sequence never... LDREX ... DSB STREX CMP BNE loop .... LDR (into aborting region) The LDREX... now appears “before” the LDREX and DSB) LDREX DSB STREX The LDR... because it is aborting The LDREX is executed, and sets the... back on the same failing LDREX/STREX sequence. Conditions: The erratum... in the middle of the LDREX/STREX sequence, then the processor... the erratum from happening: • Usual LDREX/STREX code sequences do not... in the middle of the LDREX/STREX sequence on each iteration... the next iteration of the LDREX/STREX sequence will succeed. Workarounds... in the middle of the LDREX/STREX sequence. If a DSB is... it before the LDREX/STREX sequence, and implement the LDREX/STREX sequence...,” can be reported on an LDREX that is preceded by a write... by the execution of an LDREX instruction, can cause the “STREX... region. • The processor executes an LDREX instruction. • No DSB instruction is... response on AXI) while the LDREX is being executed, the erratum... Ordered memory region and the LDREX instruction. Proposed Solution: No fix... happen: MOV r1,#0x40 Loop: LDREX r5, [r1,#0x0] CMP r5...



Дата загрузки: 2017-01-23
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0/5
... region, followed by a condition-failed LDREX, might deadlock the processor No...,” can be reported on an LDREX that is preceded by a write... the exclusive monitor Description: A conditional LDREX might set the internal exclusive... conditional LDREX along with non-conditional STREX. • If no conditional LDREX is... cannot be triggered. • If conditional LDREX is used, the associated STREX... set by the condition failed LDREX, the following STREX will not... BSP does not use conditional LDREX. Chip Errata for the i.MX... monitor. So, if a program executes a LDREX/STREX loop which keeps on... middle of the LDREX/STREX sequence, then the LDREX/STREX sequence never... LDREX ... DSB STREX CMP BNE loop .... LDR (into aborting region) The LDREX... now appears “before” the LDREX and DSB) LDREX DSB STREX The LDR... because it is aborting The LDREX is executed, and sets the... back on the same failing LDREX/STREX sequence. Conditions: The erratum... in the middle of the LDREX/STREX sequence, then the processor... the erratum from happening: • Usual LDREX/STREX code sequences do not... in the middle of the LDREX/STREX sequence on each iteration... the next iteration of the LDREX/STREX sequence will succeed. Workarounds... in the middle of the LDREX/STREX sequence. If a DSB is... it before the LDREX/STREX sequence, and implement the LDREX/STREX sequence... region, followed by a condition-failed LDREX, might deadlock the processor Description... by the execution of a conditional, LDREX instruction that fails its condition... region. • The processor executes a conditional LDREX instruction. • The instruction fails its... memory region and the conditional LDREX. Proposed Solution: No fix scheduled... BSP. No conditional usage of LDREX instructions in the BSP. Chip...,” can be reported on an LDREX that is preceded by a write... by the execution of an LDREX instruction, can cause the “STREX... region. • The processor executes an LDREX instruction. • No DSB instruction is... response on AXI) while the LDREX is being executed, the erratum... Ordered memory region and the LDREX instruction. Proposed Solution: No fix... happen: MOV r1,#0x40 Loop: LDREX r5, [r1,#0x0] CMP r5...



Дата загрузки: 2016-12-29
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0.2/5
... "0x0001") t1 : Time of Execute LDREX instruction ~ Execute STREX instruction (Write... ~ Execute LDREX instruction again. t3 : Time of Read "0x0000" ~ Execute LDREX instruction again. t4 : Time of Execute LDREX instruction ~ Execute... t3 > t4 Execute LDREX instruction. 0x0001 Execute LDREX instruction. 0x0001 Execute STREX.... t2 Execute processing 1 processing 3. Execute LDREX instruction. Result of the execution... t3 has elapsed. 0x0000 Execute LDREX instruction. 0x0000 Judge the read... + 1".) Result is success. t3 Execute LDREX instruction. 0x0001 Execute STREX instruction... 6. Result of the execution Execute LDREX instruction. 0x0000 Execute STREX instruction...



Дата загрузки: 2017-01-23
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0.17/5
... DDI 0301D Assembler Load exclusive LDREX{cond} , [ ] Store exclusive STREX{cond... same data monitors as the LDREX and STREX instructions, a local and... same data monitors as the LDREX and STREX instructions, a local and... same data monitors as the LDREX and STREX instructions, a local and... instructions. 0x2, ARM1176JZF-S processors support: • LDREX and STREX • LDREXB, LDREXH, LDREXD... if U is set to 0 WSync LDREX, STREX, SWP, either access if... inter-process communication: • load-exclusive, LDREX, LDREXB, LDREXH, and LDREXD • store... non-shared memory regions, the LDREX{B,H,D} and STREX{B,H,D} instructions are presented... for any processor. 8.2.3 Example of LDREX and STREX usage This is..., or Either. Load exclusive instructions, LDREX, LDREXB, LDREXD, and LDREXH, trigger...,LDRB, LDRBT, LDRSB, LDRH, LDRSH, LDREX, LDREXB, LDREXH, LDREXD, STR, STRT... behavior for the SWP, SWPB, LDREX, and STREX instructions. In all..., , [Rn] 2 2 3 SWPB Rd, , [Rn] 2 2 3 LDREX , [Rn] 1 1 3 STREX, , , [Rn] 1 1 3 LDREX{B,H,D} , [Rn] 1 1 3 STREX{B,H,D} , , [Rn..., LDRSH, LDRH, LDRSB, LDRB, LDRBT, LDREX, RFE, STREX, SWP, and SWPB... memory synchronization. That is, the LDREX, STREX, SWP, and SWPB instructions...



Дата загрузки: 2016-12-24
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0.16/5
... monitor. Therefore, if a program executes a LDREX/STREX loop, with the DSB... middle of the LDREX/STREX sequence, then the LDREX/STREX sequence never... in the middle of the LDREX/STREX sequence. This is a third.... Strongly Ordered Write Followed By LDREX Might Deadlock Processor Answer Record... region, followed by a condition-failed LDREX instruction, might deadlock the processor...,” Might Be Reported On An LDREX Instruction Answer Record 55018 A write... by the execution of an LDREX instruction, might cause the “STREX... Strongly Ordered Write Followed By LDREX Might Deadlock Processor; SD Card...,” Might Be Reported On An LDREX Instruction;Possible Denial Of Service...



Дата загрузки: 2016-12-24
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0.16/5
... monitor. Therefore, if a program executes a LDREX/STREX loop, with the DSB... middle of the LDREX/STREX sequence, then the LDREX/STREX sequence never... in the middle of the LDREX/STREX sequence. This is a third.... Strongly Ordered Write Followed By LDREX Might Deadlock Processor Answer Record... region, followed by a condition-failed LDREX instruction, might deadlock the processor...,” Might Be Reported On An LDREX Instruction Answer Record 55018 A write... by the execution of an LDREX instruction, might cause the “STREX... Strongly Ordered Write Followed By LDREX Might Deadlock Processor; SD Card...,” Might Be Reported On An LDREX Instruction; Possible Denial Of Service...



Дата загрузки: 2016-12-21
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0.16/5
... и Store-Exclusive образуют следующие пары: • LDREX и STREX – работа с словами; • LDREXH и STREXH... процессора. Подробнее см. описание инструкций LDREX, STREX и CLREX. Указания по программированию... int __ldrex(volatile void *ptr) LDREX, LDREXH, LDREXB int __strex(unsigned... LDRB, LDRBT LDRD Rn{!}, reglist LDREX LDREXB Rt, [Rn, #offset] Rt... Загрузка регистра по относительному адресу LDREX{type} Эксклюзивное чтение регистра POP..., К1986ВЕ91Н4 LDREX и STREX Эксклюзивное чтение и запись регистров. С и нт ак си с LDREX{cond... равным нулю. Оп и сан и е Команды LDREX, LDREXB и LDREXH позволяют загрузить соответственно... R1 значение, ; соответствующее блокировке ресурса LDREX R0, [LockAddr] CMP R0, #0 ITT...



Дата загрузки: 2016-12-29
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0.31/5
... instructions: 0x2 = the processor supports: • LDREX and STREX • LDREXB, LDREXH, LDREXD... and store instructions, for example LDREX and STREX, can be used... load/store exclusive (LDREXB, LDREXH, LDREX, LDREXD, STREXB, STREXH, STREX and... is an LDM, LDR, LDRD, LDREX, or LDRT. The lower Result... the CLREX, DMB, DSB, ISB, LDREX, LDREXB, LDREXD, LDREXH, STREX, STREXB... Memory cycles Result latency CLREX 1 - - LDREX , [Rn] 1 1 2 LDREXB , [Rn] 1 1 2 LDREXH , [Rn...



Дата загрузки: 2016-12-21
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0.11/5
... monitor. Therefore, if a program executes a LDREX/STREX loop, with the DSB... middle of the LDREX/STREX sequence, then the LDREX/STREX sequence never... in the middle of the LDREX/STREX sequence. This is a third.... Strongly Ordered Write Followed By LDREX Might Deadlock Processor Answer Record... region, followed by a condition-failed LDREX instruction, might deadlock the processor...,” Might Be Reported On An LDREX Instruction Answer Record 55018 A write... by the execution of an LDREX instruction, might cause the “STREX...



Дата загрузки: 2016-12-25
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0.22/5
... memory, writes it to a register LDREX ,[ {,# }] Load register exclusive halfword calculates... STRD. Load-store exclusive 32 LDREX, STREX, LDREXB, LDREXH, STREXB, STREXH.... Load-store Special 32 1+Nb LDREX, STREX, LDREXB, LDREXH, STREXB, STREXH... band, data segment, and unaligned). • LDREX and STREX can be pipelined... as explained for LDR. Equally LDREX is treated exactly as an... memory synchronization. That is, the LDREX and STREX instructions. Glossary-10...