Ракетный блок. PS0. [Редактировать]

Технические характеристики

#ХарактеристикаЗначение
1Длина, метра10
2ТопливоРДТТ
3Тяга, кН645
4Масса, кг10900
5Масса (сухая), кг2010
6Масса (топлива), кг8890
7Диаметр, метра1
8Время (работы), секунда44
9Удельный (импульс), секунд250

Экономические характеристики

#ХарактеристикаДата измеренияЗначение
1Стоимость (изготовления), млн. долл.2
2Количество (изготовленных блоков), шт.120

Найдено 310 документов по запросу «PS0». [Перейти к поиску]


Дата загрузки: 2017-05-20
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0.59/5
... INTEDG T0CS T0SE PS2 PS1 PS0 1111 1111 0000 0000 18... — PCLATH 19 PSA PS2 PS1 PS0 1111 1111 0000 0000 18... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7 RBPU: PORTB... the Timer0 module bit 2-0 PS2:PS0: Prescaler Rate Select bits Bit... 1111 1111 PSA PS2 PS1 PS0 1111 1111 1111 1111 86h... 1 M U X 8-bit Prescaler 8 8 - to - 1MUX PS2:PS0 PSA WDT Enable bit 1 0 MUX... Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).  2002 Microchip Technology... device. 5.4 The PSA and PS2:PS0 bits (OPTION<3:0>) determine the prescaler... 0000 000x 0000 000u PSA PS0 PS2 PS1 1111 1111 1111... Timer 1 Postscaler M U X 8 8 - to - 1 MUX PS2:PS0 PSA WDT Enable Bit To...-out Note: PSA and PS2:PS0 are bits in the OPTION... Bit 1 Bit 0 FOSC1 FOSC0 PS1 PS0 Legend: Shaded cells are not... Register INTEDG bit ................................................................. 13 PS2:PS0 bits............................................................... 13 PSA bit........................................................................ 13... Bit) ................................................. 13 Rate Select (PS2:PS0 bits) ........................................ 13 Power-down Mode... bit) ................................................. 13 Rate Select (PS2:PS0 bits) ........................................ 13 PRO MATE II...



Дата загрузки: 2017-05-20
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0.56/5
... T0CS T0SE PSA PS2 PS1 PS0 Program Counter (PC) Least Significant... T0CS T0SE PSA PS2 PS1 PS0 IRP RP1 RP0 TO PD... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7 RBPU: PORTB... T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 ANS5... - 1 MUX WDT Enable bit PS2:PS0 PSA 1 0 MUX PSA WDT Time... Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).  2003 Microchip Technology... details. The PSA and PS2:PS0 bits (OPTION<3:0>) determine the prescaler... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7 RBPU: PORTB... PSA 1111 1111 PS2 PS1 PS0 1111 1111 x = unknown, u = unchanged, - = unimplemented... T0CS T0SE PSA PS2 PS1 PS0 LVP BOREN MVCLRE FOSC2 PWRTEN... Register INTEDG Bit ................................................................ 18 PS2:PS0 Bits .............................................................. 18 PSA Bit ....................................................................... 18... Bit) ................................................ 18 Rate Select (PS2:PS0 Bits) ....................................... 18 Power Managed Modes... Bit) ................................................ 18 Rate Select (PS2:PS0 Bits) ....................................... 18 PRO MATE II...



Дата загрузки: 2017-05-21
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0.19/5
... T0CS T0SE PSA PS2 PS1 PS0 PD Z DC C Low order 8 bits... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7 RBPU: PORTB... the Timer0 module bit 2-0 PS2:PS0: Prescaler Rate Select bits Bit... T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 GIE... register. The PSA and PS2:PS0 bits (OPTION_REG<3:0>) determine the prescaler... (2 Cycle Delay) T0SE 3 PS2, PS1, PS0 PSA T0CS Set Interrupt Flag... Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared... 8-bit Prescaler M U X 8 8 - to - 1 MUX PS2:PS0 PSA 1 0 WDT Enable bit MUX... Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>). TABLE 5-1: Address REGISTERS... T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 ---1 1111... (Figure 5-2) 0 WDT Timer 1 • M Postscaler U 8 X PS2:PS0 8 - to -1 MUX PSA WDT Enable...-out Note: PSA and PS2:PS0 are bits in the OPTION_REG... T0CS T0SE PSA PS2 PS1 PS0 OPTION_REG RBPU Value on all... OPTION Register .................................................................. 9 INTEDG Bit ................................................................... 9 PS2:PS0 Bits ................................................................ 9 PSA Bit.......................................................................... 9 RBPU Bit..., 25 INTEDG Bit ................................................................. 29 PS2:PS0 Bits .............................................................. 19 PSA Bit ....................................................................... 19... (PSA Bit) ................................................... 9 Rate Select (PS2:PS0 Bits) .......................................... 9 Postscaler. See Prescaler Power... Diagram............................................................. 20 Rate Select (PS2:PS0 Bits) ........................................ 19 Switching Prescaler Assignment... (PSA Bit) ................................................... 9 Rate Select (PS2:PS0 Bits) .......................................... 9 PRO MATE II Universal...



Дата загрузки: 2017-05-20
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0.14/5
... 0000 23 PSA PS2 PS1 PS0 1111 1111 17, 54 0000... T0CS T0SE PSA PS2 PS1 PS0 IRP RP1 RP0 TO PD... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7 RBPU: PORTB... the Timer0 module bit 2-0 PS2:PS0: Prescaler Rate Select bits Bit... uuuu uuuu PSA PS2 PS1 PS0 1111 1111 1111 1111 PORTB...-1 MUX WDT Enable bit PS2:PS0 PSA 1 0 MUX PSA WDT Time... Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>).  2004 Microchip Technology... Figure 6-1). The PSA and PS2:PS0 bits (OPTION_REG<3:0>) determine the prescaler... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7 RBPU: PORTB... the Timer0 module bit 2-0 PS2:PS0: Prescaler Rate Select bits Bit... INTEDG T0CS T0SE PSA PS1 PS0 1111 1111 1111 1111 81h... 31.25 kHz Postscaler M U X 8 PS2:PS0 8-to-1 MUX PSA WDT Enable...-out Note: PSA and PS2:PS0 are bits in the OPTION_REG... T0CS T0SE PSA PS2 PS1 PS0 LVP BOREN MCLRE FOSC2 PWRTEN... INTEDG Bit ...........................................................17, 54 PS2:PS0 Bits ............................................................. 17 PSA Bit ...................................................................... 17... Bit) ................................................. 17 Rate Select (PS2:PS0 Bits) ........................................ 17 Power-Down Mode... Bit) ................................................. 17 Rate Select (PS2:PS0 Bits) ........................................ 17 PRO MATE II...



Дата загрузки: 2017-05-20
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0.23/5
... 0000 0000 PSA PS2 PS1 PS0 1111 1111 1111 1111 PD... T0CS T0SE PSA PS2 PS1 PS0 PD Z DC C Program Counter's (PC... T0CS T0SE PSA PS2 PS1 PS0 bit7 bit0 bit 7: RBPU: PORTB... at POR reset bit 2-0: PS2:PS0: Prescaler Rate Select bits Bit... uuuu T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 PORTB... M U X 1 8-bit Prescaler 8 8 - to - 1MUX PS2:PS0 PSA WDT Enable bit 1 0 MUX... Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>).  1999 Microchip Technology... device. 5.3 The PSA and PS2:PS0 bits (OPTION_REG<3:0>) determine the prescaler... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7: RBPU bit... at POR reset bit 2-0: PS2:PS0: Prescaler Rate Select bits Note... T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 Legend... Timer Postscaler M U X 1 8 8 - to - 1 MUX PS2:PS0 PSA WDT Enable Bit To... 5-1) 0 1 MUX Note: PSA and PS2:PS0 are bits in the OPTION_REG... T0CS T0SE PSA PS2 PS1 PS0 Legend: Shaded cells are not... ..................................................... 19 INTEDG Bit ................................................................ 19 PS2:PS0 Bits ............................................................. 19 PSA Bit ....................................................................... 19... Bit) ................................................ 19 Rate Select (PS2:PS0 Bits) ....................................... 19 Power-on Reset... Bit) ................................................ 19 Rate Select (PS2:PS0 Bits) ....................................... 19 PRO MATE II...



Дата загрузки: 2017-05-20
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0.33/5
... 1722.521 Bleed Ps0-P2= 0.000 Efficiencies: Ps8-Ps0= polytr Compressor 0.8600....45 1246.287 Ps8-Ps0= 0.000 Station Bleed Ps0-P2= 0.000 Efficiencies.../W2 = 0.00000 Bleed Ps0-P2= 0.000 Efficiencies: Ps8-Ps0= PSFC = = 0.1646 kg.../W2 = 0.00000 Bleed Ps0-P2= 0.000 Efficiencies: Ps8-Ps0= Heat Rate= 36.../W2 = 0.01000 -------------------------------------------- P2/P1 = 1.00000 Ps0-P2= Ps8 = 101.325 kPa Bleed 0.000 Efficiencies: Ps8-Ps0= 641.426 120187.3 kW 654.../W2 = 0.01000 -------------------------------------------- P2/P1 = 1.00000 Ps0-P2= Ps8 = 101.325 kPa Bleed 0.000 Efficiencies: Ps8-Ps0= 641.706 120184.5 kW 654.../W2 = 0.01000 -------------------------------------------- P2/P1 = 1.00000 Ps0-P2= Ps8 = 101.325 kPa Bleed 0.000 Efficiencies: Ps8-Ps0= 641.358 120003.3 kW 654.../W2 = 0.01000 -------------------------------------------- P2/P1 = 1.00000 Ps0-P2= Ps8 = 101.325 kPa Bleed 0.000 Efficiencies: Ps8-Ps0= 641.373 0.3234 654.463...



Дата загрузки: 2017-05-20
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0.07/5
... INTEDG T0CS T0SE PS2 PS1 PS0 1111 1111 0000 0000 18... — PCLATH 19 PSA PS2 PS1 PS0 1111 1111 0000 0000 18... T0CS T0SE PSA PS2 PS1 PS0 bit 7 bit 0 bit 7 RBPU: PORTB... the Timer0 module bit 2-0 PS2:PS0: Prescaler Rate Select bits Bit... 1111 1111 PSA PS2 PS1 PS0 1111 1111 1111 1111 86h... 1 M U X 8-bit Prescaler 8 8 - to - 1MUX PS2:PS0 PSA WDT Enable bit 1 0 MUX... Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).  2002 Microchip Technology... device. 5.4 The PSA and PS2:PS0 bits (OPTION<3:0>) determine the prescaler... 0000 000x 0000 000u PSA PS0 PS2 PS1 1111 1111 1111... Timer 1 Postscaler M U X 8 8 - to - 1 MUX PS2:PS0 PSA WDT Enable Bit To...-out Note: PSA and PS2:PS0 are bits in the OPTION... Bit 1 Bit 0 FOSC1 FOSC0 PS1 PS0 Legend: Shaded cells are not... Register INTEDG bit ................................................................. 13 PS2:PS0 bits............................................................... 13 PSA bit........................................................................ 13... Bit) ................................................. 13 Rate Select (PS2:PS0 bits) ........................................ 13 Power-down Mode... bit) ................................................. 13 Rate Select (PS2:PS0 bits) ........................................ 13 PRO MATE II...



Дата загрузки: 2017-04-09
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0.12/5
... - - I2C4SDA T1CCP1 - - M0PWM7 - - - - EN0TXEN LCDDATA05 PS0 D12 - - - T2CCP0 - - M0FAULT0 - - - - - LCDDATA20 PS1... V4 K18 D12 PA4 (3) PM0 (3) PS0 (3) I/O TTL 16/32-Bit Timer... RO 0 RO 0 PS1 RW 0 reserved PS0 reserved Bit/Field Name Type... across a read-modify-write operation. 5:4 PS0 RW 0x0 Generator 0 PWM Module...



Дата загрузки: 2017-04-09
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0.27/5
... «проекции» s1 , . . . , sn секрета с вероятностью Ps0 (s1 , . . . , sn ). Отметим, что i-й участник... , а также оба распределения вероятностей p(s0 ) и Ps0 (s1 , . . . , sn ). Эти два распределения... одно: P (s0 , s1 , . . . , sn ) = p(s0 )Ps0 (s1 , . . . , sn ), что и было сделано... исчезает, если мы выпишем распределение Ps0 (s1 , . . . , sn ), которое очевидно равно...



Дата загрузки: 2016-12-25
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0.41/5
... Identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207 13.9.10 I-/D-TSB PS0/PS1 Pointer and Direct Pointer... Context Zero TSB Base 13.9.3 PS0 Load/store does NOP 13... = 3) IMMU Context Zero TSB Base PS0 Load/store does NOP 13... = 3) DMMU Context Nonzero TSB Base PS0 Load/store does NOP DMMU... IMMU Context Nonzero TSB Base PS0 Load/store does NOP 13...– 1F816 Any Y 13.9.5 IMMU TSB PS0 Pointer register 13.9.1 0 Load does... Y 816– F816 016 — DMMU TSB PS0 Pointer register 13.9.1 0 Load does... for two different page sizes: PS0 and PS1, as specified in... the TSB register allows the PS0 and PS1 pointers to be... case of separate or split PS0/PS1 TSB(s). No hardware TSB... TTEs of pages other than PS0 and PS1. Since the TSB... addition, simple modifications to the PS0 and PS1 index pointers provided... reload a missing TLB entry for a PS0 or PS1 page. These services... the most common cases of PS0 and PS1 page miss processing... the virtual addresses where the PS0 and PS1 TTEs would be... appropriate zero/nonzero context and PS0/PS1 BASE register; it ranges... context BASE register. PS0 refers to the ps0 field of the Config... to provide separate TSBs for PS0 and PS1, without requiring them... a pair of contiguous TSBs for PS0 and PS1 with the proper... = TSB_Base_PS0{YC63:13+N} :: VA{21+N+3*PS0:13+3*PS0} :: 0000 PS1_POINTER = TSB_Base_PS1{63...{63:14+N} :: 0 :: VA{21+N+3*PS0:13+3*PS0} :: 0000 PS1_POINTER = TSB_Base_PS1{63:14... Strand I-/D-Context Zero TSB Base PS0 3616 3216 016 RW Strand... Strand I-/D-Context Nonzero TSB Base PS0 3E16 3A16 016 RW Strand... 5116 5916 016 R Strand I-/D-TSB PS0 Pointer registers 5216 5A16 016... as for two page sizes (PS0 and PS1, specified by the... sized) TSB regions for the PS0 and the PS1 TTEs. In... separate TSB base pointers for PS0 and PS1, the use of... deprecated. When split = 0, the TSB PS0 and PS1 Pointer addresses are... TSB can be used for PS0 and PS1, without the requirement... the TSB are shared by PS0 and PS1 TTEs. Programming Note... = 0 with TSB_BASE_PS0 and TSB_BASE_PS1 identical), PS0 and PS1 page TTEs can... the TSB Base pointers for PS0 and PS1 to differing non... memory). For example, suppose an PS0 = 8-Kbyte page at VA = 200016... the values for PS1 and PS0 for the TSB Registers. FIGURE... Bit ps1 11 10 Field 8 7 — ps0 3 2 0 Description 10:8 ps1 Page size for matching *TSB_BASE_PS1. 2:0 ps0 Page size for matching TSB_BASE_PS0... size into ps1 (and/or ps0), the value of 516 (256... loaded into ps1 (and/or ps0), and no error trap will... for details. 13.9.10 I-/D-TSB PS0/PS1 Pointer and Direct Pointer... software-maintained TSB. The TSB PS0 and PS1 Pointer registers provide the possible locations of the PS0 and PS1 TTE, respectively, where PS0 and PS1 are selected from ... by hardware to either the PS0 or PS1 Pointer register in... the miss were from the PS0 page size. The TSB Pointer... bit that controls selection of PS0 or PS1 address formation for...-PS1 page, in which case PS0 is assumed. • 207 Note When... not be used. The I-/D-TSB PS0/PS1 Pointer registers are defined... 13-5 13.9.11 0 I-/D-MMU TSB PS0/PS1 Pointer and D-MMU Direct...